After decades of development, silicon photonics technology has matured in recent years with products gradually making market entrance. Despite superior performance demonstrated in many areas such as modulation and detection, certain key functionalities are still unsuitable for monolithic integration. Noticeable examples include optical source and wavelength division multiplexers due to unfavourable material properties in light generation and temperature stability. Hybrid integration and inter-chip photonics packaging are two common approaches to address this. Photonics packaging is often preferred in industry due to its superior yield and design flexibility. Alignment tolerance is however a critical parameter for achieving high yield in photonics packaging. It would therefore be desirable to provide a photonics packaging method with improved alignment tolerance.